8Gb, 16Gb & 32Gb SLC HLNAND Flash with Dual Bank and 4KB Page

Features

Fully compliant HyperLink HL1-133 / HL1-200 / HL1-266 (DDR 133/200/266)
High speed interface at 66/100/133 MHz system clock
Differential clock inputs (CK and CK#)
Bank-oriented memory architecture
Dual bank architecture
Configurable Link width (x1, x2, x4 or x8)
Highly flexible modular command structure
Concurrent operations
- Concurrent Read
- Concurrent Program
- Concurrent Erase
- Read while Program
- Read while Erase
- Program while Erase
Multiple Blocks erasable
Page-pair erasable
Multiple Page-pairs erasable
Scalable memory capacity
Broadcasting commands
Daisy-chain cascade up to 255 number of linked devices to increase memory capacity with undiminished data throughput
1.8V/2.5V/3.3V LVCMOS compatible IO
Power Supply
- VCC = 1.8V or 2.5V or 3.3V
- VCCQ = 1.8V or 2.5V or 3.3V
Organization (HL9F08G12Cxxx-1W)
- Page Size: (4K + 128) bytes
- Block Size: 64 pages = (256K + 8K) bytes
- Bank Size: 2048 blocks = (512M + 16M) bytes
- Device Size: 2 banks = (1G + 32M) bytes
Package
- 48-pin TSOP-I (12 x 20 / 0.5mm pitch)
- 52-pin ULGA (12 x 17 / 1.0mm pitch)

Coming Soon