8Gb, 16Gb & 32Gb SLC HLNAND Flash with FlexPlane and Variable Page Size
Features
- Fully compliant HyperLink HL1-133 / HL1-200 / HL1-266 (DDR 133/200/266)
- High speed interface at 66/100/133 MHz system clock
- Differential clock inputs (CK and CK#)
- Bank-oriented memory architecture
- Configurable Link width (x1, x2, x4 or x8)
- Highly flexible modular command structure
- FlexPlane Operations with Variable Page Size
- Page-pair erasable
- Multiple Page-pairs erasable
- Scalable memory capacity
- Broadcasting commands
- Daisy-chain cascade up to 255 number of linked devices to increase memory capacity with undiminished data throughput
- 1.8V/2.5V/3.3V LVCMOS compatible IO
- Power Supply
- VCC = 1.8V or 2.5V or 3.3V
- VCCQ = 1.8V or 2.5V or 3.3V
- Organization (HL9F08G11Bxxx-1W)
- Page Size: (2K + 64) Bytes
- Block Size: 64 Pages = (128K + 4K) Bytes
- Plane Size: 2048 Blocks = (256M + 8M) Bytes
- Device Size: 4 Planes = (1G + 32M) Bytes
- Package
- 48-pin TSOP-I (12 x 20 / 0.5mm pitch)
- 52-pin ULGA (12 x 17 / 1.0mm pitch)
Documents
Datasheet—8Gb, 16Gb & 32Gb SLC HLNAND Flash with FlexPlane and Variable Page Size (x1, x2, x4 or x8) [PDF] login required
Simulation Models
Verilog Model
Coming Soon