Reducing System Power with the HyperLink Interface (2008)

Introduction

Power consumption in memory subsystems, particularly those with large numbers of memory devices such as SSD, is typically dominated by the I/O power dissipated in transferring data between the controller and the memory devices. HyperLink defines a ring topology that delivers significant power benefits over the traditional bus topology employed by all mainstream memory devices, including NAND Flash, NOR Flash, SRAM and DRAM. An SSD implemented with HLNAND can achieve half the power of an equivalent SSD employing ONFI 2.0 NAND Flash devices. This is very significant in both portable applications where battery life is critical and in enterprise applications where heat and energy footprint considerations dominate.

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